Aluminum-copper and related alloys were once the preferred alloys for forming interconnect structures in electronic devices such as integrated circuit chips. However, the present demands of the microelectronic industry for increased density and high performance (speed and efficiency) requires that the interconnect structures consist of pure or nearly pure copper. Performance is improved because the resistivity of copper and certain copper alloys is much lower than the resistivity of aluminum-copper. Also, narrow interconnect structures (lines) can be used, thus providing higher wiring densities.
A single damascene process for fabricating an interconnect structure is shown in FIGS. 1A to 1D. As shown in FIG. 1A, an insulator layer 10 is deposited on a substrate and patterned to form a structure of a line or stud. An underlayer 12 is deposited along the sidewalls of the line or via as well as on the top surface of the insulator layer 10. A seed layer 14 is then deposited over underlayer 12 as shown in FIG. 1B. The function of seed layer 14 is to provide a base onto which a main conductor layer 16 can be deposited as shown in FIG. 1C. To complete the wiring step in the single damascene process, the excess copper is planarized by a method such as chemical mechanical polishing to remove the excess top surface conducting material 16, top surface seed layer 24 and top surface underlayer 22 to provide an exposed surface of a copper line or via 26. Lastly, a capping layer 18 is deposited as shown in FIG. 1D. The procedure can be repeated for the next wiring level and/or studs to build a multi-level interconnect structure. In a dual-damascene process, both a stud and a line level are fabricated in the same process step.
The seed layer in an interconnect structure can serve several functions. If the copper conducting layer is formed by a chemical vapor deposition process, a seed layer is often used to initiate the chemical deposition of the copper. In an electroplating process, a seed layer is desirable to provide electrical continuity to the electrodes which supply the plating current. In a high temperature reflow sputtering process, a seed layer is desirable for providing a surface with good wetting and nucleation growth characteristics.
U.S. Pat. No. 6,181,012 describes a seed layer for depositing a conducting layer of a copper alloy. The composition and structure of a seed layer does not have to be the same as the composition and structure of the conducting layer. For instance, the seed layer typically has a higher electrical resistivity than the copper conductor. However, as long as the cross-sectional area occupied by the seed layer is a small fraction of the entire conductor cross-sectional area, the overall line resistance is determined by the resistivity of the copper conductor.
The described seed layers are also said to minimize the electromigration of copper into the dielectric. The electromigration phenomenon occurs when the superposition of an electric field onto random thermal diffusion in a metallic solid causes a net drift of ions in the direction of the electron flow. Any diffusion of copper ions into the silicon substrate can cause device failure.
The seed layers described in U.S. Pat. No. 6,181,012 include Cu(Sn), Cu(In), Cu(Zr), Cu(Ti) and Cu(C, N, O, Cl, S). Secondary metals can be added to these alloys to improve the adhesion properties to the copper. These secondary metals include Cu(Al), Cu(Mg), and alloys of Cu with other reactive metals such as Be, Ca, Sr, Ba, Sc, Y, La, and rare earth series elements of Ce, Pr, Nd, Sm, Eu, Gd, Th, Dy, Ho, Er, Tm, Yb and Lu, and Hf, V, Mb, Ta, Cr, Mo, W, Mn, Re, Si and Ge. In addition, other secondary metals can be used to improve the surface properties of the seed layer including B, O, N, P, Fe, Ru, Os, Co, Rh, Ir, Ni, Pd, Pt, Ag, Au, Zn and Cd. A specific metal chosen was silver, which has low solubility in Cu and forms no Cu compounds. Silver also has low resistivity that is comparable to the main copper conductor. Other metals and alloys of some metals which have low solubility in Cu and form no copper compounds include Mo, W and Co.
Following the plating of the copper conducting layer and a mechanical polishing step, a capping layer is formed on the polished copper surface. The function of the capping layer is to minimize the electromigration of copper into adjacent materials. Many types of materials to cap copper have been proposed including both electroless and electrolytically plated metals as well as physical vapor deposited metal and organic-based capping materials. Selective electroless deposition of some metal alloys, in particular of CoWP, has been shown to significantly improve electromigration lifetime, see Hu et al., “Reduced Electromigration of Cu Wires by Surface Coating.” Applied Physics Letters, 81(10), 2002, p. 1782. U.S. Pat. No. 5,695,810 describes the use of electroless deposited CoWP films as barrier layers including as a capping material for copper interconnect structures. However, electroless processes typically require some type of seed layer to initiate the nucleation of the capping material.
Rather than trying to improve upon existing seed layers or develop new seed layers for capping materials, particularly electroless CoWP capping materials, Applicants sought a different approach to forming a capping material on copper conductors.